Nozad Karim presently is the Vice President of SiP & System Integration at Amkor Technology. He has over 20 years’ experience with SiP & module technology developments, and over 30 years of experience working with semiconductor packaging, circuit and system designs for digital, analog, and RF/Microwave applications. Prior to Amkor, he served in engineering and management roles with Motorola Communication, Texas Instruments, & Compaq Computer.
Rozalia Beica is currently leading the Semiconductor Business Line within AT&S. Prior to AT&S she had several executive roles with various organizations across the supply chain: electronic materials (Rohm and Haas Electronic Materials, Dow & DuPont), equipment (Semitool, Applied Materials and Lam Research), device manufacturing (Maxim IC) and market research & strategy consulting firm (Yole Developpement). Rozalia is actively involved in various industry activities, recently awarded with the IMAPS 2020 Leadership Award. Current engagements include: Member of the Board of Governors for IEEE Electronics Packaging Society and Vice General Chair of 71th ECTC, Chair of the Heterogeneous Integration Roadmap WLP Technical Working Group, Executive Chair of System in Package China Symposium, Advisory Board Member 3DinCites and IMPACT Taiwan. Past activities: IMAPS VP of Technology, General Chair IMAPS DPC, Program Director EMC3D Consortia, General Chair Global Semi & Electronics Forum, Technical Advisory Board Member SRC, several other memberships in industry committees. Rozalia has over 150 presentations & publications, including 3 book chapters on 3D Integration. Rozalia has a M.Sc in Chemical Engineering (Romania), a M. Sc. in Management of Technology (USA) and a Global Executive MBA from IE Business School (Spain) in partnership with Fudan University (China), Brown University (USA) and Insper University (Brazil).
With over 25+ years experience in electronics process engineering, material science and technology strategic planning, David is leading innovative assembly technology development for high volume manufacturing operation of consumer electronics, including smartphones, smartwatches, SiP modules, automotive modules, tablets, PC, etc. David has spent many years on Design for Manufacturing (DFM), developed DFX design guidelines, wrote assembly process specifications & standards, established NPI (New Product Introduction) verification facilities and audited EMS outsourcing. Prior to Huawei, David also held a several senior and principal technical positions in Nokia Mobile Phones, Nortel Networks and Alcatel. David is also holding several technology patents in US, Europe and China, leading industrial consortium and external technology collaboration and actively providing keynote presentations and speeches in conferences, seminar and training courses with international background and East-meets-West culture & multi-language capabilities.
Rahul Manepalli is a Sr. Principal Engineer and the Director of Module Engineering in Substrate and Package Technology Development Group in Intel Corporation. Rahul manages the Module Engineering group responsible for development of next generation Substrate and Package Technologies for all of Intel’s packaging needs. He has over 20 years of experience in Packaging (Assembly & Substrate materials, processes and modules) and has lead the startup and development of multiple Intel factories and Technology Development teams. He holds over 40 + worldwide patents in the area of electronic packaging and has a Ph.D. in Chemical Engineering from the Georgia Institute of Technology.
Feng Ling is currently Founder and CEO of Xpeedic, a leading EDA software provider. Dr. Ling has over 20 years of industry experience in EDA, RF front end, and system-in-package spanning from Motorola, Neolinear, Cadence, Physware, to Xpeedic. Dr. Ling received his Ph.D. degree in electrical engineering from the University of Illinois at Urbana-Champaign (UIUC) in 2000. He is a Senior Member of IEEE. He has authored and co-authored 3 book chapters and more than 60 papers in refereed journals and conference proceedings.
Farhang Yazdani is the President and CEO of BroadPak Corporation. BroadPak is internationally recognized as the “key provider of innovative total solution for 2.5D/3D products”. Through his 20 years with the industry, he has served in various technical, management, and advisory positions with leading semiconductor companies worldwide. He is the author of the book “Foundations of Heterogeneous Integration: An Industry-Based, 2.5D/3D Pathfinding and Co-Design Approach”. He is the recipient of 2013 NIPSIA award in recognition of his contribution to the advancement and innovations in packaging technologies. He has numerous publications and IPs in the area of 2.5D/3D Packaging and Assembly, serves on various technical committees and is a frequent reviewer for IEEE Journal of Advanced Packaging. He received his undergraduate and graduate degrees in Chemical Engineering and Mechanical Engineering from the University of Washington, Seattle.
Feng Ling is currently Co-Founder and SVP of Xpeedic, a leading EDA software provider. Dr. Dai has over 20 years of industry experience in EDA, RF front end, and system-in-package. Dr. Dai received his Ph.D. degree in Shanghai Jiaotong University. He is an Engineering Expert (Integrated Circuit) for National Information Technology Talent Training in MIIT China , the guest chief expert in Microsystems for CETC , and former senior technical consultant of Cadence Shanghai Global R&D Center. He is also an international journal for IEEE TMTT, IEEE TAP, DAC, etc.
Rainbow Yuan is Director of Business Line 3C (communication, computer, consumer) of AT&S Business Unit Mobile Device& Substrates and responsible for 3C business development and strategy globally.
Bob joined Amkor in 2004, he is responsible for Amkor’s SiP product line. Bob was previously responsible for advanced wafer level and package development. He has served in various corporate business development and vice-president positions and was responsible for Amkor’s Molded Embedded Package, Fine Pitch Flip Chip, Copper Pillar and next generation Package on Package TMV? developments. Bob previously worked for IBM, Kyocera, Unitive and ChipPAC. He holds a mechanical engineering degree from Polytechnic University (NYU).
E.?Jan Vardaman?is president and founder of TechSearch International, Inc., which has provided market research and technology trend analysis in semiconductor packaging since 1987.? She is the author of numerous publications on emerging trends in semiconductor packaging and assembly. ?She is a senior member of IEEE EPS and is an IEEE EPS Distinguished Lecturer. She received the IMAPS GBC Partnership award in 2012, the Daniel C. Hughes, Jr. Memorial Award in 2018, the Sidney J. Stein International Award in 2019, and she is an IMAPS Fellow. ?She is a member of MEPTEC, SMTA, and SEMI. ?Before founding TechSearch International, she served on the corporate staff of Microelectronics and Computer Technology Corporation (MCC), the electronics industry’s first pre-competitive research consortium.
Mr. Yaojian Lin received a Bachelor's degree in Metal Materials and Heat Treatment, from Department of Mechanical Engineering of Central China University of Technology, a Master's degree in Composites, from Department of Materials of Shanghai Jiaotong University, and a Master's degree in Materials Science from University of Rochester. He has worked at Shanghai Jiaotong University (Composite Institute), Lucent (Bell Labs / Sy Chipp) and STATS ChipPAC (Headquarters Research and Development in Singapore). He has 26 years of R&D and technology transfer to engineering production experience. He currently serves as Vice President, R&D at JCET Group Headquarter, and General Manager of China R&D Center. He has nearly 20 years of experience in the development and engineering of wafer-level packages (IPD, RDL, Bumping, Fanout/eWLB and MEoL), high-density SiP and FO-MCM fcBGA. He has been granted more than 200 U.S. and Chinese patents in advanced packaging.
Dr. Hong Xie is currently the GM of the SiP/SLI technical center of the TFME research institute, responssibnle for the technology development of the SiP/SLI technologies. Hong obtained his BS and MS degrees from Tsinghua University, Beijing, China and PhD from university of Colorado at Boulder, all in Mechanical engineering. Hong has over 25 years of experience in the assembly and test area, having worked at TFME, Goertek Microelectronics, FCI and Assembly and Test Technology Development of Intel Corporation at Chandler. Hong has held various engineering and management positions in assembly and test, in package design, modeling and simulation, process development and manufacturing. Hong is a senior member of IEEE and has published over a dozen journal papers and received 35 US patents.
Suny Li, SiP Tech Specialist, has involved in more than 40 kinds of SiP and advanced packaging projects in China; Three technical books have been published: ""MicroSystem Based on SiP Technology"" PHEI 2021, ""SiP System-in-Package Design and Simulation"" (English version) Wiley 2017, ""SiP Design and Simulation"" PHEI 2012; He has worked in Chinese Academy of Sciences and SIEMENS, and participated in China's manned space ""Shenzhou"" spacecraft and China EU cooperation ""double star"" project. Served as the session leader of SiP conference China in 2018 and 2021. Now works in AcconSys. WeChat official account: SiPTechnology.
Scaling to Enable Heterogenous Integration Dilan has worked on multiple generations of Intel’s substrate research and development programs since the 45nm technology node. He has been instrumental in enabling new dielectric materials and processes in support of Intel’s IC substrates and continues to drive future roadmaps necessary for heterogenous integration. Dilan has a Ph.D. in Materials Science and Engineering from Massachusetts Institute of Technology and BEng from Imperial College, London, U.K.
Prof. Ricky Lee is Chair Professor of Smart Manufacturing in the Systems Hub of HKUS(GZ). He has a concurrent appointment as Executive Director of HKUST Shenzhen Platform Development Office. He is Fellow of IEEE and ASME.
- Graduated in Shanghai Jiaotong University,Bacheler degree on Electrical Engineering and hold the master degree of Engineering Management - AT&S Technology Integration team manager,ECP packaging Product Manager - Joined AT&S 14 years and now in charge of AT&S CCC/Semi product application technical strategy also Embedding packaging technology development
Dr. Daquan Yu is a Distinguished Professor of Xiamen University and the founder of Xiamen Sky Semiconductor Co., Ltd. He was the President of Research Academy of Advanced Packaging Technology of TSHT Group from 2014 to 2019. Before that, he was a professor of Institute of Microelectronics, Chinese Academy of Sciences from 2010 to 2015. He had carried out research work at Fraunhofer IZM in Germany, and Institute of Microelectronics in Singapore from 2005 to 2010. He has authored or co-authored more than 200 peer-reviewed technical publications and holds more than 70 patents. He is a member of the Expert Committee of the 02 National Science and Technology Major Program of China, vice president of MEMS branch of China Semiconductor Industry Association, and a Senior member of IEEE.
Hu joined Indium Corporation in 2016 and is based in Suzhou, China. He has over 15 years of experience in semiconductor packaging and is a veteran in advanced assembly technology development, process improvement, and assembly materials applications. He has a master’s degree in IC engineering from the Chinese Academy of Science and a bachelor’s degree in electronic information science and technology from Nankai University, Tianjin, China.
Dr. Jing Zhang is the director of innovation China of Heraeus electronics. Dr. Zhang received his PhD degree on electronic packaging engineering at Delft University of Technology in 2015. He furthered his research as a postdoc researcher working on advanced power electronics packaging technology in Delft. In 2017, he joined Heraeus Electronics leading pilot projects on advanced packaging solution for SiC power devices. So far, he has participated more than 20 research projects, and project funding exceed 80 million RMBs. Solutions out of these projects have been already adopted in many industry applications, including power electronics in automotive, traction, and power grid. He has authored or co-authored 7 peer-reviewed technical publications and holds 6 patents. Additionally, he is also chairing the IEEE EPS Benelux Chapter. Meanwhile, Dr. Zhang is also the executive secretary of International Roadmap of Wide Band-gap power semiconductor (ITRW).
Senior process engineer in ZESTRON North Asia. More than 10 years of packaging experience including wafer cutting, die bond and wire bond. Before joining ZESTRON, he worked in many world-famous companies.
Rick Shen is the TCS manager of Semiconductor Packaging at Henkel. He is responsible for technical service for semiconductor packaging. He has worked at Henkel for 10 years and is responsible for technical service for semiconductor traditiona, advanced and memory applications, including die attach pastes, die attach films, underfills, wafer level encapsulants and package level EMI shielding.
Joined Shennan Circuits Co., Ltd after graduating from Northwestern Polytechnical University in July 2011,and served as the project manager for the MPP module of the R&D department. In August 2015, transferred internally to SCI,as the Project/ Product Manager of R & D department, mainly responsible for the evaluation and import of SIP /Module projects, focused product customer development and import. He is currently the director of SIP / Module Product Line.
Master / doctor graduated from School of Materials, Beijing University of Technology, and postdoctoral from Department of Mechanical Engineering, Tsinghua University. Now he is the Chief Technology Officer of Payton Technology (Shenzhen) Co., Ltd., and has more than ten years of advanced packaging technology research and development experience. He has worked in Institute of Microelectronics of the Chinese Academy of Sciences and Huawei Hisilicon, engaged in R&D and planning of advanced packaging technology. He has published more than 40 academic papers in core journals at home and abroad and applied for more than 20 invention patents. Also, he is the director of Technology Innovation Strategic Alliance of National IC Packaging and Testing Industry Chain and member of Expert Advisory Committee, and director of Anhui Semiconductor Industry Association.
Joined ChipPAC (was STATS ChipPAC later in 2004) in 2001, served as Process Engineer, Designer, Senior Design Manager, and Deputy Director of TPM for Asia Region. In 2020, joined RMT as VP of R&D.
Taking responsibility of General Manager of FUJI China, and General Manager of Kunshan FUJI Machine China Co., Ltd. with more than 20 years of experience in the SMT industry, from On-site technical support for customers to overcoming the latest technologies and issues. He has always been close to customers, keeping in-depth understanding of customer needs, and plan the functions and specifications of SMT equipment according to requirements, and promoting the further development of the industry.
Has been worked in SMT industry for more than 20 years since 2001. Joined ASM company in 2003, worked in several different department and had deep knowledge of SMT industry. Currently working in ASM Product Marketing Department, Mainly resposibilties are serving for AP customer in China South region. Devoting to provide AP customer best solution based on ASM advanced platform and personal knowldge.
He entered the semiconductor industry in 2009 and has 10 years of experience in the semiconductor industry. He joined TENSUN in 2010. He is mainly responsible for the operation of the semiconductor equipment business unit and serves advanced packaging customers in the mainland. He has a deep understanding of the advanced packaging industry. Involvement, to provide the best solution for advanced packaging customers.
Graduated from Beijing University of Aeronautics and Astronautics with a Master‘s degree，Owning a number of United States Utility patents.Senior R&D engineer of ASM Pacific Technology Ltd, and technical director of Wuhan Ruize Technology Development Co.Ltd. Researched and developed the ISLinda which has become the industry standard and the monopoly product of the camera module industry,being applied by all above-scale COB process lines in China.
Chu Zhenghao,high tech industry expert, joined ANSYS in 2012 and has many years of experience in high-speed signal and power integrity design. At present, he is responsible for the technical platform planning of high tech industry and Ansys Chip/package/system co-simulation flow. Before joining ANSYS, he was responsible for the technical support of SI/PI application of customers in northern China as a technical support engineer in Cadence/Sigrity .
Dr. Li-Cheng Shen is currently the senior technical director of MCC of USI, focusing on developing and researching cutting-edge technologies of miniaturization. With more than 20 years of experience in the semiconductor industry, Dr. Shen owned more than 30 patents in the fields of Fault Diagnosis System, 3D Package, Wafer Level Package, Opto-electronic Package, Electro-optical Circuit Board, Embedded Component Substrates, RF Module Testing and RF SiP/System Assembly. He is also the technical committee member of RF, High-Speed Components & Systems of ECTC. In 1998, Dr. Shen received a PH.D. degree in Electrical and Control Engineering from Nation Chiao-Tung Universion, Taiwan.
Zachary Su is field application engineer director from Xpeedic. He has over 10 years of high-speed design experience on ASIC, package and PCB board. His research interests include signal integrity, power integrity and computation electromagnetics. In Xpeedic, he is responsible for driving EDA software development on advanced package, providing both presales and post sales technical support to customers and managing a FAE team.
Romain Fraux is the CEO of System Plus Consulting (part of Yole Group of companies), that focuses on Reverse Costing analysis of electronics, from semiconductor devices to electronic systems. Supporting industrial companies in their development, Romain and his team are offering a complete range of services, costing tools and reports. They deliver in-depth production cost studies and estimate objective selling price of a product, all based on a detailed physical analysis of each component in System Plus Consulting laboratory. Romain has been working for System Plus Consulting for more than 15 years and was previously the company's CTO. He holds a bachelor's degree in Electrical Engineering from Heriot-Watt University of Edinburgh, Scotland, a master's degree in Microelectronics from the University of Nantes, France and a Master of Business Administration.
Graduated from the University of Electronic Science and Technology of China with a Master's degree in Material. Joined ZTE in 2009, and studied the component assembly process for more than 10 years. Committed to the research on the assembly technology and reliability of high-density and new-package components.
Leon Jiang graduated from Zhejiang University with Ph.D. in Physics in 2003, also as Post-Doctor in Fudan University in 2003-2005, studying on magnetron sputtering and nano-coating. Since 2005, Leon worked in Saint-Gobain and Dow Chemical as R&D Engineer, Technical Manager, Corporate Venture Manager and Corporate Account Executive. Currently Leon is Market & Business Development Leader for Interconnect Solution Business in DuPont, responsible for the business development of IC substrate materials and solutions. During his 11 years’ career in Dow & DuPont, Leon focused on new technology investment and new business development especially in Electronic Materials.
Lewis(In-Soo) Kang is Marketing Director of nepes Corporation, he earned a master's degree in Advanced Material from KAIST (Korea Advanced Institute of Science & Technology) in 1996. Then, He joined SK-Hynix in 1997 as a packaging material and process engineer for development of ball grid array and wafer level packaging technology. In 2001, he joined nepes and up to now attended various projects related to flip chip bumping, wafer level packaging, fan-out packaging, image & MEMS sensor packaging, wafer level system packaging, IPD and TSV interposer including CTO position of nepes Singapore.
Mr. Phil Ouyang is a veteran with more than 10 years’ experience in electronics manufacturing industry. He builds knowledge of technology trends during his NI career experiencing application engineer, account manager, and business development manager. He has also served for an automation system integrator leading end-to-end delivery of turnkey-solutions, and he knows how to land a project from laboratory to production floor.
Jiandong Zhang, The Technical Service Manager from Weldtone (Xiamen) Technology Co., Ltd, a Bachelor from Hefei University of Technology in 1999 and Master from Fudan University in 2007, has about 20years experience in electronic industry , include +15years experience in electronic packing material.
Xiao DUAN, Beijing Rohde & Schwarz Communication Technology Co., Ltd, Technical Expert. Mr. Duan Xiao graduated from Micro-electronics Engineering Department of Griffith University (Australia), Master of Information Engineering. Mr. Duan Xiao takes responsivities to study, promotion and technical support for Test System for Communication area, EMC and OTA in Rohde-Schwarz.
Capcon's sales team leader, graduated from Tianjin University, has worked in ASE, K & S and Teradyne. He is familiar with the whole industry chain of semiconductor design, manufacturing, packaging and testing. He has 20 years of sales experience in semiconductor packaging and testing equipment industry. He has long-term observation and understanding of the semiconductor industry and keen insight into semiconductor technology trends and market trends.